(a) Field of the Invention
The present invention relates to an interconnection system in a semiconductor device and, more particularly, to the structure of a contact plug in the interconnection system. The present invention also relates to a method for manufacturing such an interconnection system in a semiconductor device.
(b) Description of the Related Art
Finer pattern for an interconnection system, as well as higher-integration and miniaturization for device elements, has been increasingly developed in semiconductor devices such as DRAMs. For the finer pattern and more complicated structure of the interconnection system, multi-level interconnection structure overlying a silicon substrate is generally used in the semiconductor device.
In the multi-level interconnection system, an interconnection layer is connected with an underlying interconnection layer or a diffused region of a device element through a contact plug filled in a through-hole or via-hole, which is formed in an inter-level insulator layer.
For a higher operational speed and a higher integration of device elements in the semiconductor devices, a lower resistivity is especially desired in the material used for the interconnection system including the contact plug.
In a semiconductor memory device, such as a DRAM, silicide on polysilicon (polycide) and tungsten silicide are proposed for use as the materials of the gate electrodes or word lines and bit lines, respectively. In this structure, polycide or doped polysilicon is generally used for the contact plugs connecting an overlying interconnection layer and the source/drain regions of MOSFETs constituting memory cells as well as the contacts of capacitor elements.
With further integration and finer pattern of the memory cells in a memory device, however, even the tungsten silicide, polycide or doped polysilicon is not satisfactory as a low resistive material.
Patent Publication JP-A-3(1991)-256330 proposes that a CVD tungsten film be used instead of the tungsten silicide film etc. In this structure, since the CVD tungsten film has poor adherence to an insulator film, a first underlying film made of titanium (Ti) and a second underlying film made of tungsten (W) are consecutively formed on the insulator film by sputtering before the CVD tungsten film is formed.
The CVD tungsten film formed according the teaching by the patent publication as mentioned above has problems in that the effective diameter of the contact plug is reduced compared to the depth thereof due to the three layer structure of the contact plug, that the three-layer structure raises the resistivity of the interconnection pattern on the insulator film compared to a single tungsten film, and that the fabrication process including a plasma enhanced etching step is complicated.